Advisory Board

Russell Johnsen

Mr. Johnsen is currently the Chairman of the Board of Mercury Computer Systems (NASDAQ:MRCY), which provides specialized, high-performance computing systems and software designed for embedded applications in aerospace and defense, telecommunications, medical imaging, semiconductor, EDA, and more. Mr. Johnsen was the Chairman and Chief Executive Officer of Sirific Wireless Limited, a provider of integrated circuits for the telecommunications market from 2007 until its acquisition by Icera in 2008. Prior to that, he co-founded and served as the CEO of the Occtane Group, a private company which developed and operated a proprietary network of interactive display terminals from 2005 to 2007. From 2003 through 2007, Mr. Johnsen was also President of Delumina, Inc., a technology investment and strategy consulting firm. From 1993 through 2002, Mr. Johnsen was with Analog Devices, Inc., a supplier of high performance analog, mixed signal, and digital signal processing integrated circuits. He served as the company's Vice President of Corporate Business Development in 2002, and as the Vice President and General Manager of the Analog Devices Communications Products Division from 1993 to 2001. Prior to that he served in various senior management capacities at National Semiconductor Corporation.

Rajeev Varshneya

Mr. Varshneya has over 25 years experience in technology industries, both in large multi-national and start-up businesses. Prior to joining Redpine, he was the CTO and Chief of Product Marketing for Royal Philips Electronics (Digital Networks and Home Gateway businesses). He has been involved with partnerships and alliances with AT&T, AOL, DirecTV, Echostar and Canal+. Subsequently, he had similar responsibilities for Networked Handheld multimedia products where he managed multiple product introductions in Europe and US, also at Philips Electronics. He was involved in a number of M&A transactions internationally. He was the Founder/CEO of the Philips Software business in India. Most recently, he was the CEO of Vigilistics Inc. in Irvine, California, a venture backed start-up. Mr. Varshneya holds a Bachelor of Electronics Engineering degree from New Delhi, India and a Masters degree in Electronics Engineering from Eindhoven, The Netherlands.

Farrokh Billimoria

Farrokh Billimoria is currently a Special Advisor for India to Stanford University’s Graduate School of Business and the School of Engineering. He is also on Stanford University’s Fulbright Screening Committee for the Fulbright Scholars Program.Farrokh Billimoria was most recently at Artiman Ventures, a fund he founded, focused on US-India cross-border deals, which leverage India not just for development centers but also address the markets in India. Before Artiman, he was at the Sprout Group (CSFB Venture affiliate) as a General Partner since 1999. Prior to that he was at Hambrecht and Quist (now JP Morgan/H&Q) where he was a Wall Street Analyst covering network infrastructure. He was actively involved in the corporate finance and venture capital initiatives at Hambrecht and Quist. The Wall Street Journal ranked him as an All-Star Analyst for a number of years. Previously, Farrokh was a Managing Director at Bankers Trust (acquired by Deutsche Bank) for 8 years where he was the executive responsible for the global infrastructure. He has held senior managerial roles in development engineering with various networking equipment companies and service providers. Farrokh has a bachelor’s degree in Electrical Engineering and a Master’s degree in Computer Science.

Boris Murmann

Prof. Murmann is an associate professor in the Department of Electrical Engineering at Stanford University, where he leads a team of 15 doctorate students and directs the "Rethinking Analog Design (RAD)" research initiative. Dr. Murmann’s research is in the area of mixed-signal integrated circuit design, with special emphasis on high performance data converters and sensor interfaces employing digital enhancement techniques. Prof. Murmann has co-authored over 60 technical papers, books and book chapters and holds several patents in the area of mixed-signal IC design. In 2008, Dr. Murmann was a co-recipient of the the Best Student Paper Award at the VLSI Circuit Symposium and the recipient of the Best Invited Paper Award at the Custom Integrated Circuits Conference (CICC). In 2009 and 2010, he received the Agilent Early Career Professor Award and the Sony Faculty Scholar Award, respectively. He currently serves as an associate editor of the IEEE Journal of Solid-State Circuits and member of the International Solid-State-Circuits Conference (ISSCC) program committee.

Subhasish Mitra

Prof. Mitra is an Assistant Professor in the Departments of Electrical Engineering and Computer Science of Stanford University where he leads the Stanford Robust Systems Group. Prior to joining Stanford, Prof. Mitra was a Principal Engineer at Intel Corporation. Prof. Mitra has co-authored 100+ technical papers, and has invented design and test techniques that have seen wide-spread proliferation in the semiconductor industry. His X-Compact technique for test compression is used by 50+ Intel products, and is supported by major CAD tools. His work on imperfection-immune circuits using carbon nanotubes, jointly with his students and collaborators, has been highlighted as "a significant breakthrough" by the Semiconductor Research Corporation, MIT Technology Review, EE Times, and several others.

Prof. Mitra's major honors include the Presidential Early Career Award for Scientists and Engineers (PECASE, the highest honor bestowed by the US government on early career outstanding scientists and engineers), National Science Foundation CAREER Award, Terman Fellowship, IEEE Circuits and Systems Society Donald O. Pederson Award for the best paper published in the IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, ACM SIGDA Outstanding New Faculty Award, Best Paper Award at the IEEE/ACM Design Automation Conference, a Divisional Recognition Award from Intel "for a Breakthrough Soft Error Protection Technology," a Best Paper Award at the Intel Design and Test Technology Conference for his work on Built-In Soft Error Resilience, and the Intel Achievement Award, Intel's highest corporate honor, "for the development and deployment of a breakthrough test compression technology.