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Job Openings - India Development Center Hyderabad

Job Title: Applications Engineer

Job Title: ASIC Verification Engineer / Lead / Manager

Job Title: ASIC Design Engineer / Lead / Manager

Job Title: Software Engineer / Lead / Manager

Job Title: Baseband RTL engineer

Job Title: Software Engineer (WinCE)

Job Title: Design Engineer (Analog/RF Layout)

Job Title: Senior Analog and Mixed-Signal Design Engineer

Job Title: Baseband / PHY layer engineer

Job Title: WLAN QA Lead / QA Engineer

Job Title: Communication systems intern

Job Title: Baseband RTL intern

Job Description :

The Applications Engineer would be responsible for advanced technical support for customers in North and South America .

Desired profile of the candidate :

Educational Qualification: B.Tech/M.Tech in Electronics, Communications, or Computer Science

Desired background :

Strong system design and debugging expertise (preferably in industrial, medical or consumer markets)
Good understanding of 802.11 (Wi-Fi) standard and applications
Knowledge of standard bus interfaces (SDIO, USB, SPI, UART etc.)
Strong oral and written communication skills
Experience in dealing with customers in multiple geographies

Responsibilities :

The Applications Engineer would

Work with the sales team to identify and secure new business
Present Redpine solutions to customers, understand their system requirements and suggest appropriate solutions
Support customers during evaluation, design, testing and production phases of their product development
Create and provide technical training to customers, sales representatives and distributors as well as internal sales team
Work with internal engineering teams to understand the new products/features and provide feedback
Work with product management to create application notes and articles
Work with product management to define the product roadmaps
Create reference applications using Redpine's wireless solutions

Location : Hyderabad, India (some travel may be required)

Desired work experience:

3 + years of experience in the relevant fields

Job Description :

The job involves verification of modules, subsystems and the full chip for complex SoCs. It also includes developing Testbenches in System Verilog and System C, developing assertions, and creating test plans for SoCs with industry standard capability including 802.11 WLAN, USB, PCI, AHB, SDIO and PCIE.

Desired profile of the candidate :

Educational Qualification: B.Tech / M.Tech in Electronics and Communications, VLSI

Desired background :

System Verilog or System C, C
PERL or TCL scripting for regression and automation
Working experience with VMM verification methodology
Working experience in developing Test bench from the architecture either at module level or SoC level
Developing Test plans and test cases for Chip level/SoC level/module level verification
Working experience with advanced verification techniques like constrained random generation, functional coverage and assertions
Familiarity with methods for automated test case execution/status tracking/documentation

Desired work experience:

Min 2 years to Max 12 Years

Reference :

RSI_ASIC_Design_Sep_11

Job Description :

The job involves working on architecture/micro architecture/implementation of AHB based SoC components; and working towards state of the art ultra low power chip development.

Desired profile of the candidate :

Educational Qualifications: B.Tech / M.Tech in Electronics and Communications, VLSI

Desired background :

Verilog, C
Strong design skills with good visualization of data and control path
Should have handled reasonably sized data & control path intensive blocks with independent responsibility
Thorough familiarity with AHB based SoC design flow
Experience with any of the interfaces like SDIO/PCIe/USB/Ethernet/I2S/Mobile DDR memory controller
Module and SoC level timing closure
Exposure to FPGA based flow
Knowledge of wireless protocols such as WLAN

Desired work experience:

Min 2 years to Max 15 Years

Reference :

RSI_SW_Sep_11

Job Description :

Protocol development in ‘C’ for wireless standards like WLAN, Bluetooth and Zigbee. The job involves working on device drivers and embedded software.

Desired profile of the candidate :

Qualifications: B.Tech / M.Tech in ECE or Computer Science

Desired background :

Minimum 2 years of experience in firmware and device drivers design and development
Working experience in protocol development and/or open source stacks for any of the wireless technologies such as WLAN, Zigbee and Bluetooth
Linux network device drivers
Excellent ‘C’ programming skills

Desired work experience:

Min 2 years to Max 15 Years

Reference :

RSI_BaseBand_Sep_11

Job Description :

Multiple positions are available. Title and role will depend on the candidate’s experience, and exposure to other areas relate to physical layer. The job involves converting micro-architecture or matlab code into power/gatecount optimal hardware using Verilog.
This is an excellent and unique opportunity to work at the cutting edge of wireless technology. The team consists of highly enthusiastic, young and dynamic individuals with a wide range of experience.

Desired profile of the candidate :

Qualifications: B.Tech / M.Tech / MS / PhD in ECE, Communications

Desired background :

RTL (Verilog or VHDL) coding/design skills
Experience with Matlab
Exposure to or past RTL implementation for physical layer (wireless or wireline standards) is required
Good knowledge of signal processing / communications is a plus

Desired work experience:

Min 1 years to Max 8 Years

Reference :

RSI_SW_WINCE_Sep_11

Job Description :

This position involves the architecture, design, development, and validation of network stack and embedded software for systems with 802.11 Wireless LAN connectivity. Redpine offers silicon and subsystem solutions for 802.11n connectivity and our software engineering division is responsible for the development of embedded software and firmware that are required to complete our product offerings.

Desired profile of the candidate :

Qualifications: B.Tech / M.Tech / from ECE / Computer Science

Desired background :

3 to 4 years of experience in designing and writing network stack and embedded software for Wireless LAN or related systems
Experience in developing device drivers on Windows(Win XP, Win CE)
Experience in embedded software on Windows CE RTOS & Windows XP Embedded, Windows Mobile, and Windows Drivers
Good C coding skills with an appetite to follow stringent process rules
People with Windows CE certifications (e.g. Microsoft certified technology specialist MCTS on Windows CE 6.0) would have preference..

Desired work experience:

Min 3 years to Max 6 Years

Reference :

RSI_ RF_Sep_11

Job Description :

The job involves performing custom layout and verification of high performance RF IC products designed in BiCMOS/CMOS technologies.
Responsibilities include transistor level RF and analog cell layout and verification, floor planning, top level routing and tapeout activities.
The layout engineer will work closely with design engineers to produce layouts optimized for performance, power and size.

Desired profile of the candidate :

Qualifications: B.Tech in ECE

Desired background :

Knowledge of Linux platform and usage of Cadence Virtuoso layout Suite.
Possess good understanding of Calibre/Assura DRC, LVS and LPE verification flow
Experience in floor-planning, Analog/RF cell-, block- and chip-level layout
Should have a deep understanding of RF and analog layout requirements (shielding / matching) from device physics perspective.

Desired work experience:

Min 1years to Max 8 Years

Location of posting :

Hyderabad

Reference :

RSI_AMSD_Sep_11

Responsibilities / Job Description :

Translate specifications to lower level requirements
Optimize/innovate at the architectural and circuit level for area, power, and performance
Circuit Design, Simulations and Verification
Layout design and block level/top level placement guidelines.
Layout Parasitic extracted simulations
Silicon bring-up and characterization

Requirements / Job Qualifications:

B.Tech/M.Tech/Ph.D in ECE, RF, Analog circuits, with 5 years experience in this area
Proficiency in Cadence Design Environment for Analog, Mixed-Signal and RF designs
Prior experience in the CMOS design of ADC/DAC, filters, analog amplifier stages, etc.
- Prior Experience in silicon bring-up and characterization using digital, analog and RF test-equipment
The candidate should
- Have strong fundamentals in Analog and RF.
- Be a team-player and should be able to mentor and lead junior engineers.
- Have good communication skills and experience in technical documentation
- Be able to work in a fast-paced entrepreneurial environment

Reference :

RSI_CSD_Apr_12

Job Description:

The job involves understanding wireless standards and implementing transmit and receive blocks in Matlab.
May involve algorithm design.
Verilog implementation will also be required in due course (will be trained if required for this).
This is an excellent opportunity to work at the cutting edge of wireless technology and learn some new skills.
The team consists of highly enthusiastic, young and dynamic individuals with a wide range of experience.

Desired profile of the candidate :

Qualifications: M.Tech / MS / PhD in ECE, Communications

Desired background :

Good knowledge of fundamentals of Communication systems and Signal Processing.
Proficiency in MATLAB
Experience in digital design using Verilog or VHDL preferred
Candidate with prior experience in one or more of the following standards would be preferred: Bluetooth, Wi-Fi (802.11abgn) or WiMax/LTE.

Desired work experience:

All levels of experience welcome.

Reference :

RSI_SQA_Sep_11

Job Description :

As a member of the Software Quality assurance team for the company’s 802.11 WLAN products, you will be responsible for testing, verifying and debugging WLAN station and access point software for the Redpine Products. You will be a hands-on individual contributor with an opportunity to build a test team in the Embedded Wi-Fi area.

In addition to above responsibilities following are needed:

Ability to prioritize and handle multiple projects in a dynamic environment
Lead the QA team responsible for all software quality efforts including platform/feature testing, system testing, regression testing, and interoperability testing, as well as automation of testing.
Plan for long-term growth and efficient operation of the wireless LAN test group.

Desired profile of the candidate :

Qualifications: B.Tech/M.Tech in ECE or Computer Science

Desired background :

3+ years of WLAN test experience
Excellent verbal and written communication skills
Experience with WiFi, WLAN, 802.11a/b/g/n standards.
Direct work experience with network monitoring and protocol analysis tool such as WireShark/Ethereal/Chariot. Experience testing and working with different access points and stations.

Desired work experience:

Min 2years to Max 8 Years

Reference :

Communication systems intern

Job Description :

The work would involve writing Matlab and will include interfacing with Verilog (will be trained if needed). Candidate must be open and interested in working on items that help in baseband testing and automation as well. Depending on the proficiency in communication systems and Matlab, implementation of various blocks in a communication system and/or working on algorithms will be part of the work. Minimum commitment of 2 1/2 months required. Only exceptional cases will be considered otherwise.

Desired profile of the candidate :

Qualifications: M.Tech / MS / PhD in ECE, Communications : obtained or pursuing

Desired background :

Good knowledge of fundamentals of Communication systems and Signal Processing.
Proficiency in MATLAB is a must
Prior experience in implementing various blocks of a communication system is a plus
Experience in digital design using Verilog or VHDL is a big plus
Understanding of fixed point design is a plus

Reference :

Baseband RTL intern

Job Description :

The work would involve writing communication system modules and test benches, verification and testing. Depending on the proficiency of the candidate, he may work or be involved in micro-architecture design. Candidate must be open and interested in working on items that help in baseband testing and automation as well. He may work also on Matlab implementation or testing of communication systems blocks depending on his skills. Minimum commitment of 2 1/2 months required. Only exceptional cases will be considered otherwise.

Desired profile of the candidate :

Qualifications: B.Tech / M.Tech / MS / PhD in ECE, Communications : obtained or pursuing

Desired background :

Good knowledge of MATLAB and Verilog is a must
Prior experience in implementing blocks of a communication or signal processing (image signal processing included) in RTL is strongly desired
Understanding of fixed point design is a plus