M2MCombo™ 802.11n 1x1, Dual-mode BT 4.0, ZigBee®


M2MCombo RS9113 is Redpine Signals’ ultra-low-power, single spatial stream, dual-band 802.11n + BT4.0 + ZigBee® Convergence SoC. The RS9113 chipset provides low-cost CMOS integration of a multi-threaded MAC processor, baseband digital signal processing, analog front-end, crystal oscillator, calibration OTP and coupled with a dual-band RF transceiver and dual-band high-power amplifiers provides a cost-effective solution targeting low-power and high QoS wireless applications.

M2MCombo leverages and improves upon Redpine’s proven low power innovations from Lite-Fi® products and provides BT4.0 and ZigBee® convergence solution for integration into mobile and M2M communication devices. With its embedded four-threaded processor and on-chip ROM and RAM, this chipset enables integration into zero host load applications with capability to run Wi-Fi security supplicant and TCP/IP on-chip thus setting a new benchmark for the “internet-of-things” market. With advanced ultra-low-power PMU, integrated analog peripherals and support for a variety of digital peripherals – RS9113 enables very low-cost implementations for wireless embedded and M2M applications.


  • Ultra-low-power, low-cost and high-throughput 1 Tx – 1 Rx Dual-band 802.11n + BT4.0 (Bluetooth LE dual-mode) + ZigBee (802.15.4-2006)
  • Data rates up to 150 Mbps using 1-Spatial Stream 802.11n MCS-7, 40MHz bandwidth mode for high user throughput
  • Hardware Assisted Radar-detection for compliance to FCC and ETSI norms, enabling usage of more channels in the 5GHz band
  • High performance Bluetooth receiver with -95dBm Rx sensitivity
  • Support for Bluetooth Transmit power class-1
  • High performance Zigbee receiver with -101dBm Rx sensitivity
  • Support for multiple Zigbee output powers up to +20dBm
  • Innovative coexistence algorithms for optimum throughput of Wi-Fi and collocated Bluetooth and Zigbee modems
  • Integrated Ultra-low-power subsystem with <2uA watch-dog mode and <30uA standby mode.
  • Integrated ThreadArch® Four-threaded processor with on chip memory for achieving high-throughputs with low-host overhead and customer specific differentiations
  • On-chip processing and memory enables option to offload Wi-Fi security supplicant and TCP/IP stack enabling zero-host load and extreme ease of integration for the “internet-of-things”
  • Advanced power management techniques adaptively minimize system power in various application profiles.
  • High level of CMOS integration to minimize RBOM (E.g., On-chip OTP)
  • Rich set of built-in analog and digital peripherals for enabling low-host load and zero-host applications
  • Support for multiple host interfaces to allow maximum flexibility for the system integrator. Host interfaces supported are USB 2.0, SDIO, SPI and UART
  • Block Diagram
  • Specifications
  • Applications
  • Support

Block Diagram - RS9113